A New Memory to Enable Ultra Low Energy Devices

Sylvain Dubois
July 17, 2017

 

The Internet of Things (IoT) has the potential to drive applications worth trillions of dollars – with every device connected to other devices and people across a wide range of applications such as smart homes and buildings, smart industrial plants or cities. Several factors are driving the rapid growth of IoT. Moore’s law is still at work creating faster, smaller, cheaper devices. Other technological advancements like low power and lower cost communications that can interconnect tiny sensors with cloud-based applications enable new business models that harvest greater value from sharing information. But there are obstacles.

Overcoming Power-Hungry Operations in Next Generation IoT Devices

More connected devices create more data every second that is stored, processed, uploaded and shared. The abundance of sensors including temperature, pressure, direction, speed, weight, paces, heart beats, light intensity, etc. will generate a flood of information to transmit. The available energy budget of IoT devices is limited. And continuous wireless data transmission is a power-hungry operation requiring far too much energy for battery-powered applications.

Next generation IoT devices will be low-cost, highly integrated systems requiring specialized SoCs with more functions on chip. Most will need to run on a single battery charge for 5-10 years, or even harvest energy from their environment. This is particularly critical in remote applications, such as smart sensors deployed across wide areas like cities, where regular battery changes would be impractical and economically non-viable.

Meeting the energy budget will necessitate a variety of energy-saving strategies and many devices will be designed to spend most of their time in standby or other energy saving modes, active only to perform necessary functions. Designers will be looking for ways to reduce not only the volume of data to be transmitted, but also the frequency and duration transmission to conserve power. With such restrictive energy budgets, memory will need to operate on far less power and be more integrated than what’s possible with today’s memory technologies, which are too power hungry, slow, unreliable and difficult to manufacture.

IoT devices need innovative, energy-efficient memory technologies

Innovative memory technologies can help address the most critical IoT energy challenges. Lower power and lower voltage operation, monolithic integration, faster read and write times, non-volatility and higher capacity are all ways that memory technology can help IoT devices to achieve greater energy efficiency. By design, non-volatile memory can be completely powered down, yet retain all stored information.

More powerful, yet lower power microcontrollers make pre-processing a viable way to reduce the volume of sensor data to be transmitted. However, efficient processing necessitates greater local memory capacity for stored data to be processed and programs to execute. To reduce the frequency of data transmissions, designers will make greater use of local data buffering, as batching data for transmission allows the frequency of transmissions to be significantly reduced. Faster read and write times enable data to be sent more quickly, reducing the duration of each transmission, and optimizing on/off duty cycles.

More memory will also be needed to ensure interoperability, as the lack of a globally accepted IoT connectivity standards will require devices to support multiple protocol stacks. Today’s on-chip memory technologies do not scale economically to greater densities, so SoC designers are forced to rely on external chips for this additional memory.

ReRAM to the Rescue

Resistive Random-Access Memory (ReRAM) is widely hailed as the most promising technology in the race to develop innovative, low energy, more scalable, high-capacity, high-performance and reliable storage solutions. ReRAM cells typically employ a switching material sandwiched between two metallic electrodes that can exhibit different resistance characteristics when a voltage is applied across it. Significant performance differences can be achieved depending on the switching materials and memory cell organization chosen.

Figure1

Unlike flash, ReRAM is bit/byte-level addressable and can be architected with small pages that can be independently reprogrammed. On-chip storage drastically simplifies the complexity of the microcontroller by removing a large portion of background memory access required for flash-related data management. It also enables the use of wide memory buses that break the bandwidth bottleneck between computing cores and storage. ReRAM achieves visible benefits in read and write latencies, lower energy consumption and increased lifetime of the storage solutions.

At the memory cell level, ReRAM improves programming performance and reduces power consumption; on a system level, on-chip storage memory reduces energy consumption by up to 50x than external NVM . Lower, more predictable latencies also reduce energy by shortening the execution time of code fetching or data streaming.

Monolithic integration of storage memory eliminates the need for a variety of mechanical connectivity components and methods of varying complexities that can lower yields and increase overall fabrication cost. Moreover, ReRAM technology can easily integrate with standard CMOS logic circuitry and be manufactured using existing CMOS fabs. More on-chip storage enables data logging applications to achieve energy savings of 40X compared to Bluetooth Low Energy (BLE) wireless transmission.

Figure 2

ReRAM solutions can enable radical innovations in the connected IoT device world. Low energy, fast, nonvolatile memory that can be easily integrated in very large capacities on a single SoC along with logic, analog and RF components that can operate for years without a battery charge, will enable the future of smarter devices across Internet of things, consumer electronics, and industrial applications.


Sylvain DuboisSylvain Dubois joined the Crossbar management team in 2013 as Vice President of Business Development and Strategic Marketing. He has 17 years of semiconductor experience in business development and strategic product marketing.

Prior to joining Crossbar, Dubois led strategic product positioning and market engagement for developing new products at Spansion. Responsible for identifying new growth opportunities and expanding the product portfolio, Dubois was instrumental in defining the Spansion Flash memory product roadmap. Prior to Spansion, he was a System-on-Chip architect of OMAP application processors at Texas Instruments.

Sylvain Dubois holds a Master of Science in Microelectronics from E.S.I.E.E. (Paris), University of Southampton (UK) and Universidad Pontifica Comillas (Spain).